John Gustafson was Senior Fellow and Chief Product Architect at AMD (Graphics Processor Group, formerly ATI), until June 2013. He left to complete a book on a new approach to computer arithmetic. He has joined the Boards of SSRLabs, Etaphase Inc., and Clustered Systems Company Inc. He co-founded Ceranovo as CTO in November 2013 to pursue a proven technology for capacitors with very high energy and power density. John was a Director at Intel Labs from March 2009 to February 2012; he managed the group charged with driving off-roadmap, high-impact exploratory research. He was a member of the Board of Directors of Massively Parallel Technologies (MPT) from 2007 to May 2014, a company where he took the CEO role from May, 2008 to March 2009. MPT is a parallel computing company founded in 1999 that received multiple contracts from the DARPA HPCS program (the same one that funded Cray, Sun, and IBM); it is now applying the patented IP it generated during that phase to the creation of firmware/hardware product lines that allow HPC clusters to scale to thousands of processors on a single problem. Its communication technology is complementary to the arithmetic accelerators made by companies like ClearSpeed. John joined ClearSpeed in 2005 as CTO for HPC after leading HPC efforts at Sun. He has 42 years experience using and designing compute-intensive systems, including the first matrix algebra accelerator and the first commercial massively-parallel cluster while at Floating Point Systems. His pioneering work on a 1024-processor nCUBE at Sandia created a watershed in parallel computing, for which he received the inaugural Gordon Bell Award. He has received three R&D 100 Awards for innovative performance models, including the model commonly known as Gustafson’s Law or Scaled Speedup. He received his B.S. degree from Caltech and his M.S. and Ph.D. degrees from Iowa State University, all in Applied Mathematics.
John Gustafson
